During their fabrication process, ICs (integrated circuits) often incur defects due to minor imperfections in the process or in the semiconductor material. For that reason, ICs are usually designed to contain redundant circuit elements, such as spare rows and columns of memory cells in semiconductor memory devices, e.g., a DRAM (dynamic random access memory), an SRAM (static random access memory), or an embedded memory. Such devices are also designed to include laser-severable links between electrical contacts of the redundant circuit elements. Such links can be removed, for example, to disconnect a defective memory cell and to substitute a replacement redundant cell. Similar techniques are also used to sever links in order to program or configure logic products, such as gate arrays or ASICs (application-specific integrated circuits). After an IC has been fabricated, its circuit elements are tested for defects, and the locations of defects may be recorded in a data file or defect map. A laser-based link processing system can be employed to remove selected links so as to make the IC useful, provided positional information regarding the layout of the IC and the location of its circuit elements are known with sufficient accuracy.